Robust Verilog Parser

Robust Verilog Parser

I have some verilog codes that I found on OpenCores but the source files
are written in RobustVerilog. The site recommended a RobustVerilog parser
which I have downloaded as well. However, when I tried to run the run
script, the following error occurred:
robust.exe - Unable To Locate Component This application has failed to
start because libstdc++-6.dll was not found. Re-installing the application
may fix this problem.
However, I was not able to find libstdc++-6.dll. Does anyone have
experience in the RobustVerilog parser ? I need to convert the source file
into regular verilog in order to integrate with my design.
Thanks in Advance !